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  Does Eagle have the capability to produce ODB++ files?
By: Joe Adler on Wed, 24 August 2011
11 14574 Tue, 26 January 2016 20:44
By: Clem Martins
  Cant completely ripup a board
By: james kain on Tue, 26 January 2016
2 4846 Tue, 26 January 2016 18:27
By: james kain
  Printing NULL character
By: Brent Wilkins on Mon, 25 January 2016
1 4204 Tue, 26 January 2016 09:21
By: Morten Leikvoll
  Possible Eagle ltspice.ulp redundancy "SPICEMODEL" attribute
By: Sjef van Gool on Fri, 22 January 2016
3 4865 Mon, 25 January 2016 20:14
By: Jorge Garcia
  LTSpice export: no net names!
By: Simon Leiner on Thu, 28 May 2015
5 6955 Mon, 25 January 2016 20:10
By: Jorge Garcia
  change auto diameter of vias
By: SouthernAtHeart on Sun, 24 January 2016
4 5288 Mon, 25 January 2016 14:59
By: SouthernAtHeart
  change auto diameter of vias
By: SouthernAtHeart on Sun, 24 January 2016
1 3980 Sun, 24 January 2016 04:28
By: Clem Martins
  change auto diameter of vias
By: SouthernAtHeart on Sun, 24 January 2016
1 3942 Sun, 24 January 2016 01:34
By: Clem Martins
  change the Auto Diameter size
By: SouthernAtHeart on Sun, 24 January 2016
1 4041 Sun, 24 January 2016 01:33
By: Clem Martins
  change auto diameter of vias
By: SouthernAtHeart on Sun, 24 January 2016
1 3967 Sun, 24 January 2016 01:32
By: Clem Martins
  taking too long to generate gerber file
By: karan mittal on Wed, 20 January 2016
8 7045 Fri, 22 January 2016 19:36
By: warrenbrayshaw
  copy component outline from tplace to bplace
By: Jeremy Ayers on Thu, 21 January 2016
7 6371 Fri, 22 January 2016 02:11
By: Paul Romanyszyn
  objects are outside the board area
error "message comes some objects are outside the board area
By: Helm1234 on Thu, 21 January 2016
1 4162 Thu, 21 January 2016 10:08
By: Helm1234
  The interface is still broken ...
By: Paul Badger on Thu, 21 January 2016
0 3944 Thu, 21 January 2016 01:39
By: Paul Badger
  Re: IDF Function Stopped Working
By: Dave Topmiller on Wed, 20 January 2016
3 4628 Wed, 20 January 2016 18:23
By: Dave Topmiller
  IDF Function Stopped Working
By: Dave Topmiller on Wed, 20 January 2016
1 4062 Wed, 20 January 2016 15:32
By: Marc Battistello
  How use a prototype PCB with wire on the top
By: Lui Ba on Tue, 12 January 2016
4 5374 Tue, 19 January 2016 16:45
By: Lui Ba
  How to turn of crosshairs on a new symbol
By: Peter Corney on Fri, 15 January 2016
1 3909 Tue, 19 January 2016 15:56
By: CadSoft Support
  device
how to create a device
By: Helm1234 on Tue, 19 January 2016
0 3594 Tue, 19 January 2016 15:45
By: Helm1234
  *rlc*
cannot select resistors and capacitors or coils,
By: Helm1234 on Mon, 18 January 2016
5 5421 Tue, 19 January 2016 15:11
By: Helm1234
  Adding a component to a schematic
By: Peter Corney on Mon, 18 January 2016
5 5327 Mon, 18 January 2016 23:22
By: warrenbrayshaw
  complex pcb board shape
By: William Orlando on Fri, 15 January 2016
4 5550 Mon, 18 January 2016 05:33
By: Clem Martins
  Initial board layout too big for Eagle Light
By: james kain on Sat, 16 January 2016
2 4549 Sat, 16 January 2016 01:27
By: warrenbrayshaw
  Eagle newbie...
By: stephen gregory on Fri, 15 January 2016
1 4485 Fri, 15 January 2016 23:34
By: rachaelp
  Polygon
By: Colin Chinsky on Tue, 12 January 2016
13 10956 Fri, 15 January 2016 20:13
By: warrenbrayshaw
  Problem with eaglecon.exe 7.3.0 running ULPs
By: Henry Forson on Wed, 20 May 2015
9 14569 Fri, 15 January 2016 18:26
By: Armel Fourreau
  eagle stops responding when i start auto router
By: karan mittal on Thu, 14 January 2016
7 6487 Fri, 15 January 2016 17:53
By: Jorge Garcia
  How to Panalize pcb
By: Ramdas Adav on Wed, 09 September 2015
1 4903 Fri, 15 January 2016 09:40
By: David Hackenbracht
  Better Eagle zooming with trackballs, how?
By: Joerg on Wed, 13 January 2016
7 6203 Thu, 14 January 2016 23:40
By: Joerg
  Re: print component on board
By: Clem Martins on Thu, 14 January 2016
0 319 Thu, 14 January 2016 20:05
By: Clem Martins
  print component on board
By: David Whiteley on Thu, 14 January 2016
2 4215 Thu, 14 January 2016 20:01
By: Clem Martins
  Eagle 7.5.0 - Retina 4k HiDPi not working at all on Mac OS
By: Eryk SOkolowski on Thu, 19 November 2015
7 9651 Thu, 14 January 2016 13:15
By: rachaelp
  Eagle stopped letting me route traces. Any advice?
By: Jen Kutler on Wed, 13 January 2016
5 5306 Thu, 14 January 2016 09:01
By: Werner Harbrecht
  Can you interconnect nets with different names?
By: Roy Alfaro on Thu, 14 January 2016
1 3847 Thu, 14 January 2016 08:00
By: Rob Pearce
  Exporting an EAGLE Schematic to a very high resolution PDF
By: Eric Amikam on Wed, 13 January 2016
1 3761 Wed, 13 January 2016 22:05
By: Olin
  How to set preferred layer for a net-class
By: Robert Balogh on Thu, 07 January 2016
2 4132 Wed, 13 January 2016 15:10
By: Robert Balogh
  Desigbn link broken again, happens a lot
By: Joerg on Fri, 01 January 2016
3 4914 Tue, 12 January 2016 20:38
By: Jorge Garcia
  LTSpice no more supported?
By: Jacques MARTIN on Sat, 09 January 2016
6 6338 Tue, 12 January 2016 13:56
By: Fernando Frana
  Eagle upgrade pricing?
By: RoboticsGuy on Wed, 19 March 2014
3 6603 Tue, 12 January 2016 02:17
By: James Morrison
  7.5.0 mac bugs
By: Jonathan Swift on Fri, 20 November 2015
25 32851 Sun, 10 January 2016 18:40
By: Clem Martins
  Corrupted project file?
By: Kok Ann Seah on Wed, 12 August 2015
22 17159 Fri, 08 January 2016 21:28
By: Clem Martins
  Net Classes
By: picfve on Sat, 26 December 2015
2 4770 Thu, 07 January 2016 12:33
By: Hans Sorgatz
  oval hole in eagle
By: lac nguyen on Thu, 11 December 2014
7 8934 Thu, 07 January 2016 10:42
By: Michele Bertoni
  What to do if PCBsim's model importer reports Spice syntax errors in (many) Manufacturer supplied models?
By: J Cuppen on Sat, 02 January 2016
3 3806 Wed, 06 January 2016 17:21
By: Jorge Garcia
  Spice model LPNP and CAP not yet supported in PCBsim - is a workaround possible?
By: J Cuppen on Sat, 02 January 2016
2 3998 Wed, 06 January 2016 17:20
By: Jorge Garcia
  Error messages during simulation with Eagle-PCBsim: timestep too small, iteration limit exceeded: what next?
By: J Cuppen on Sat, 02 January 2016
5 4549 Wed, 06 January 2016 17:04
By: Jorge Garcia
  EAGLE : probleme d'export librairie
By: Yohan Yohan on Mon, 04 January 2016
3 2887 Wed, 06 January 2016 11:55
By: Guillaume barrey[1]
  Poly Lines are exploded before converting
By: karan mittal on Wed, 06 January 2016
0 2861 Wed, 06 January 2016 06:23
By: karan mittal
  What happened to the eaglecentral.ca forums (mirror of these forums). All I see is a blank page.
By: Mike Fields on Sun, 27 December 2015
9 4420 Sun, 03 January 2016 20:18
By: warrenbrayshaw
  Is panelization really routing?
How can I panelize without becoming a professional?
By: BruceMellen on Tue, 15 October 2013
9 8771 Sun, 03 January 2016 14:39
By: peterjcs23
  PCB component name (hierarchy design)
By: Aaron Pica on Thu, 23 April 2015
7 7093 Sun, 03 January 2016 04:59
By: Clem Martins
  How to import model into existing library in PCBsim?
By: J Cuppen on Sat, 02 January 2016
2 2046 Sun, 03 January 2016 04:44
By: Clem Martins
  Contradiction in naming convention in PCBsim? What to follow?
By: J Cuppen on Sat, 02 January 2016
0 1853 Sat, 02 January 2016 08:16
By: J Cuppen
  Assorted bugs with file-locking feature
By: John Miles on Wed, 23 December 2015
2 3028 Fri, 01 January 2016 07:44
By: John Miles
  I wrote over my excellon.cam file and cannot create drill files. Can I download all the cam files for Eagle 7.5?
By: Joe Muretta on Wed, 30 December 2015
2 1960 Wed, 30 December 2015 21:05
By: Joe Muretta
  Eagle libraries and EAGLE5.10
By: Dave Bullock M.B.E. on Wed, 30 December 2015
5 2321 Wed, 30 December 2015 19:25
By: warrenbrayshaw
  Is there a way to export clean polylines in a DXF from Eagle ?
By: Ovidiu Sopa on Sun, 20 December 2015
4 3176 Wed, 30 December 2015 15:57
By: picfve
  File Locking Fix on Mac Eagle 7.5.0
By: lisa fredrickson on Fri, 25 December 2015
10 4008 Wed, 30 December 2015 03:02
By: lisa fredrickson
  Eagle 7.5.0 New and annoying popup
By: Rikard Qvarnstrm on Tue, 29 December 2015
0 1810 Tue, 29 December 2015 15:12
By: Rikard Qvarnstrm
  BELKIN Play Max Wireless Router F7D4301V1 Power Supply Adapter Plug Replacement
By: Peter Doyle on Sun, 15 March 2015
8 5808 Tue, 29 December 2015 01:53
By: Peter Doyle
  SO8 powerpak eagle package (Vishay SI7288-T1)
By: Hisham Issa on Fri, 18 December 2015
4 3760 Mon, 28 December 2015 19:47
By: Jorge Garcia
  how to use a variable in pcbsim eagle
By: J Cuppen on Mon, 21 December 2015
1 2005 Mon, 28 December 2015 17:30
By: Jorge_Garcia
  How to force Eagle to not make vias where headers are placed ? (for DIY people who make the PCB themself)
By: Ovidiu Sopa on Wed, 23 December 2015
2 2035 Wed, 23 December 2015 18:25
By: Rob Pearce
  MOSFET with more than 3 pins in pcbsim - how to handle?
By: J Cuppen on Wed, 23 December 2015
0 1578 Wed, 23 December 2015 10:39
By: J Cuppen
  Schematic Component Annotations
By: COMPACT on Mon, 21 December 2015
4 2342 Wed, 23 December 2015 09:02
By: rachaelp
  Create a PCB Array in Eagle 5.5.0
By: Michael Druckenmiller on Mon, 19 October 2015
2 4199 Wed, 23 December 2015 08:27
By: Joern Paschedag
  Assembly Variant Part Attribute
By: James Littlefield on Thu, 17 December 2015
9 6221 Wed, 23 December 2015 01:04
By: James Littlefield
  brd2xml.scr
By: Keith Sloan on Mon, 21 December 2015
2 2005 Tue, 22 December 2015 05:37
By: warrenbrayshaw
  Easiest way to create a module libary?
By: Bruce Vernham on Mon, 21 December 2015
1 1851 Mon, 21 December 2015 19:47
By: Jorge Garcia
  Libraries available for download
By: Glen Bankston on Sun, 20 December 2015
2 2291 Mon, 21 December 2015 19:33
By: Jorge Garcia
  Dead End Traces
By: Mark Zechmeister on Fri, 18 December 2015
2 2354 Mon, 21 December 2015 15:55
By: Mark Zechmeister
  Width Error, no idea why?
By: Samuel Matthews on Sun, 20 December 2015
1 3423 Mon, 21 December 2015 10:22
By: Morten Leikvoll
  Ground Plane up to the limits of the PCB
By: Nikolas Weis on Fri, 18 December 2015
1 2052 Fri, 18 December 2015 20:01
By: Paul Romanyszyn
  ODB++ data format is essential to broader acceptance of Eagle
By: Andrew Perkins on Wed, 15 October 2014
5 6675 Thu, 17 December 2015 22:23
By: Jorge Garcia
  Eagle - go back one step when routing
By: Ahten on Thu, 17 December 2015
1 1898 Thu, 17 December 2015 09:42
By: Lorenz
  Differential Bus Naming Issue
By: Alan Stummer on Wed, 16 December 2015
1 2281 Thu, 17 December 2015 04:59
By: warrenbrayshaw
  Slotted Pad
By: Richard St.Louis on Thu, 10 December 2015
1 1974 Wed, 16 December 2015 05:52
By: Robert Johnson
  ULP Manual for 7.5?
By: Chuck Huber on Sun, 13 December 2015
1 2309 Tue, 15 December 2015 23:41
By: Jorge Garcia
  Remove old versions of Eagle???
By: Oppie[2] on Fri, 11 December 2015
8 3836 Tue, 15 December 2015 14:54
By: Oppie[5]
  Eagle Symbol and Footprint for Analog devices ADC AD7172-2
By: Hasan Imam on Mon, 14 December 2015
1 1885 Mon, 14 December 2015 19:26
By: Leon Heller
  Using the Library Editor
By: Jim Hannas on Sun, 13 December 2015
1 1925 Sun, 13 December 2015 15:44
By: rk
  PCB mounted Heat Sink
By: David Pollum on Sat, 12 December 2015
3 2059 Sun, 13 December 2015 15:26
By: David Pollum
  My Autorouter Effort setting isn't working
By: Travis Moore on Sun, 13 December 2015
0 1828 Sun, 13 December 2015 02:46
By: Travis Moore
  Naming thermal vias PAP64
By: Oppie[2] on Wed, 09 December 2015
6 2605 Fri, 11 December 2015 14:29
By: Oppie[2]
  EAGLE library editor
By: radhey shyam on Fri, 11 December 2015
1 2186 Fri, 11 December 2015 09:09
By: Joern Paschedag
  grounded hole?
By: David Pollum on Mon, 09 November 2015
3 4035 Thu, 10 December 2015 15:45
By: Richard St.Louis
  Rectangle vias
By: javier lopez on Mon, 23 November 2015
3 3821 Thu, 10 December 2015 15:37
By: Richard St.Louis
  set different solder stop mask sizes for vias and smd pads
By: Axel Wachter on Thu, 10 December 2015
0 1797 Thu, 10 December 2015 11:05
By: Axel Wachter
  Design Link Not Working
By: Chris Knoebel on Mon, 12 October 2015
1 3861 Thu, 10 December 2015 03:56
By: Erkan Altan
  I wish for the solder mask to cover all traces but not the bare board between the traces.
By: Hok Man Leung on Wed, 25 November 2015
2 3168 Wed, 09 December 2015 21:07
By: COMPACT
  Dual comparator LTspice export - "invoked" power pins become separate .asy
By: Peter Slotwinski on Wed, 09 December 2015
1 1868 Wed, 09 December 2015 17:34
By: Jorge Garcia
  symbol lookup error
By: John Kuzmack on Mon, 23 November 2015
4 4328 Wed, 09 December 2015 17:13
By: Jorge Garcia
  Re: I wish for the solder mask to cover all traces but not the bare board between the traces.
By: Leon Heller on Wed, 25 November 2015
7 4538 Tue, 08 December 2015 22:37
By: COMPACT
  Arduino's pad eagle autorouter
By: Said Ramdane on Fri, 04 December 2015
10 5660 Tue, 08 December 2015 22:17
By: Said Ramdane
  Autorouting ... and net prioritisation
By: Brendon Meyer on Sun, 22 November 2015
4 4993 Tue, 08 December 2015 15:23
By: eaglecandies
  ICSP Header
By: Keith Sloan on Wed, 28 October 2015
4 5315 Tue, 08 December 2015 15:22
By: eaglecandies
  Divyang
By: Divyang kateshiya on Tue, 08 December 2015
1 1939 Tue, 08 December 2015 11:34
By: Olin
  op-amp
By: Divyang kateshiya on Tue, 08 December 2015
0 1985 Tue, 08 December 2015 08:02
By: Divyang kateshiya
  Highlight a net while using other tools
By: Lincoln Worsham on Mon, 09 November 2015
3 5437 Tue, 08 December 2015 04:28
By: eaglecandies
  Does anyone have a UPL for eagle V5 Pich and Place format Altium
By: Boots Hughston on Sun, 06 December 2015
1 2055 Mon, 07 December 2015 05:34
By: COMPACT
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